[2027 Internship] Mixed Signal Verification Intern

Chip Design

Location

Singapore

Experience

No Work Expe.

Job Description

[What you will do] - Verification of digital IC circuit blocks within analog/RF IPs - Create analog/RF macro models for system level co-simulation verification - Verilog/WREAL Models for all RF Calibration Engines - Verilog/WREAL Models for all RF Analog leaf cells - Build RF-digital test-bench template for RF designers #LI-WC1

Main Requirements and Qualifications

[Are you the right talent?]
- Keen interest in RF/Analog behavioral modelling
- Knowledge of digital design and Verilog HDL are an added advantage.
Send us your CV our way today! Kindly provide a copy of your academic transcript for reference.