IC Physical Design Engineer (Campus)

Chip Design

Location

Singapore

Experience

No Work Expe.

Job Description

1. Working on IC physical design of 12nm/6nm/4nm and below world leading advanced process chip, from RTL to GDS. 2. Block owner, take block of 2~3 Million instances, working on Synthesis/APR(auto place and route)/Signoff. 3. Block coordinator role for more than 5~10 blocks, solving the critical issue and give the solution to block owners. 4. TOP role for the complicated hierarchical chip (more than 20 Million instances plus 500+ macros), doing floorplan and partition, responsible for full chip tapeout.

Main Requirements and Qualifications

1. Basic knowledge of electronic design or IC design, no prior experience is needed, training will be provided.
2. Basic knowledge of UNIX/LINUX env and capable of at least one of the following programming language: C/C++, Python, TCL, Perl.
3. Good communication and teamwork spirit, eager to learn new technologies and willing to take challenges.