Physical Verification Sign-off (PTD)

Branch Singapore
Job Category Chip Design
Experience More than 2 Years Work Expe.
Education Bachelor's Degree
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Job Description
- Responsible for Full-chip Physical Verification Sign-off in the area of (DRC, LVS, ANT, ERC, ESD, PERC) for tapeout.
- Co-work with Place & Route team to resolve full-chip layout integration issues.
- Coordinates with internal IP owners on IP related issues.
- Coordinates with Manufacturing Team on DRC related issues.
- Provide automation solutions to improve efficiency in tapeout flow.
- Report on tapeout issues.
- Bachelor's Degree/Master's Degree in Electrical/Electronics Engineering/ Computer Science/equivalent.
- Familiar with IC Design front-to-backend flow.
- Preferably well-versed in Calibre, Assura, Star-RCXT.
- Proficient in script programming, such as, Tcl, Perl or C-shell.
- Proficient in UNIX (Linux) platforms.
- Strong communication, problem solving and analytical skills.